The Esoc Board Essay Example for Free

The Esoc Board EssayAs mentioned in Lecture 3 and the textbook, most system of logic circuits today are built using programmable logic devices (PLDs). These devices allow circuits to be built bringly onto virtuoso chips, without the need for interconnection of separate, single purpose ICs. The eSOC II (electronic System-on-a-Chip) board is knowing to allow a direct larboard between the Quartus II software and the Altera Cyclone II EP2C8 FPGA. The board provides an interface to the chip, along with supporting interface hardware. Details about the construction and use of the eSOC II board are available in the eSOC II Users run supplied with the board. The following is a summary of information taken from that Guide. The eSOC II board is shown in reckon 1 (taken from the User Guide from Arches Computing Systems).The board contains the Altera FPGA (in the center), a 24 MHz clock bloodline (U8 to the left of the FPGA), and numerous input switches and output displays. Figure 1 eSOC II Board (from User Guide September 6, 2006) at that place are three types of input switches, single-pole-double-throw (SPDT) toggle switches (S1 and S2), debounced push-button (SPST) switches (DB0 and DB1), and non-debounced push-button switches (B0 B3). Bouncing is a mechanical assemble where a switch rapidly alternates between on and off when pressed as the metal contacts exact and break connection as the parts bounce off each other. A debounced switch is designed so that any closure produces a single on to off or off to on indication.The output features include red LEDs (RED0 RED7), green LEDs (GRN0 GRN7) and two seven-segment displays (Digit0 and Digit1). The FPGA uses a random access retentivity (RAM) technology. This pull up stakes be explained in a later course, for now the key concept is that a program is stored and kept up(p) only as long as the power is applied (like a document you forget to save, the data disappears when the power is removed). This means that every time the eSOC II board is turned off, the program in the FPGA is lost. There is a method to save a program using a different type of memory that is on the board. This memory, U3, stores the program even after power is removed. This feature will be explored in a later course.